Small Data AI: Building Reliable Models with Limited Semiconductor Data

Over the past few years of building AI for semiconductor equipment, the question I have heard most often is:

“How much data does your AI need for training?”

When I say “10-15 wafers is sufficient,” the reaction is usually one of two things: either they think I am exaggerating, or they assume the AI must be unreliable.

That is because everyone has been conditioned by general-purpose AI — GPT requires trillions of tokens, autonomous driving demands millions of hours of video, so AI must require big data.

But the big data approach simply does not work on semiconductor production lines.

Why “Big Data” Is Unavailable in Semiconductor Manufacturing

Three fundamental constraints:

1. New Equipment Has Zero Historical Data

When an equipment manufacturer delivers a new CMP tool to a customer fab, the historical data count is zero. You cannot ask the customer to run the tool for three months to accumulate data before activating AI. They cannot wait — the commissioning engineer is already running wafers.

2. Process Changes Invalidate Historical Data

Semiconductor processes iterate rapidly. A new batch of consumables or a change in target film thickness shifts the entire data distribution. The model you carefully trained may become obsolete after a single PM (preventive maintenance) cycle.

3. Data Is the Crown Jewels — No One Shares It

A fab’s process data is more sensitive than its revenue data. Tell a customer “upload your data to the cloud for model training,” and the security department will block you immediately. Data stays on-premises — that is a non-negotiable requirement.

Consequently, approaches that rely on “accumulate data first, then train AI” create a deadlock in semiconductor fabs: no data leads to no AI, which leads to no data accumulation.

Why Small Data Works: Physics Does Not Need to Be “Learned”

General-purpose AI faces an open world — a photograph might contain anything, so massive data is needed to cover every possibility.

Semiconductor equipment is different. The physics of CMP polishing is deterministic: the Preston equation describes the relationship between removal rate and pressure, speed, and slurry; the Stribeck curve characterizes friction regime transitions. These laws do not need to be “learned” from data — physicists have studied them for decades.

Our approach uses a four-layer architecture:

Layer 1: Physics model foundation. Classical models such as the Preston equation and fluid dynamics provide a baseline. It is not perfectly accurate, but directionally correct. This layer requires zero data.

Layer 2: Neural network residual correction. Every physical model deviates from the actual equipment (each machine is unique). A lightweight neural network is trained on a small dataset to compensate for this deviation. Since it only needs to learn the “residual” rather than the “full relationship,” 10-15 wafers are sufficient.

Layer 3: Online adaptive tracking. Equipment drifts during operation (consumable wear, temperature changes). A Kalman filter tracks drift trends in real time, correcting predictions wafer by wafer. No retraining is needed — the model adjusts itself.

Layer 4: Uncertainty quantification. Every prediction is accompanied by a confidence interval. If the model is “unsure,” it proactively triggers physical metrology, preventing missed detections.

Physics priors are the ultimate “data.” You already know 90% of the governing relationships. AI only needs to learn the remaining 10% — the individual equipment variance. That is why 10 wafers are sufficient — not magic, but a search space massively compressed by physical constraints.

Another Advantage of Small Data: Accuracy Improves with Use

This architecture produces a valuable byproduct — a data flywheel.

After every wafer is processed, the online adaptive layer updates the model parameters. In other words, every wafer the equipment processes makes the model “know” the equipment a little better.

Observed performance trajectory:

• Wafer 1: Error may be around 8% (physics model provides the floor)
• Wafer 5: Error drops to 4% (neural network begins compensating)
• Wafer 50: Error falls below 2% (adaptive layer has learned the equipment’s behavior)
• Wafer 500: Error stabilizes below 1%, with drift trend prediction capability

No need to feed large datasets upfront — every wafer is training data. The longer you use it, the better it understands your equipment.

For equipment manufacturers, there is an even greater value proposition: the model parameters accumulated from commissioning the first tool can be transferred to the second tool of the same model. If the first tool required 15 wafers to tune, the second may need only 5. By the tenth tool, commissioning is virtually wafer-free.

This is not a one-time software sale — it is a compounding AI asset that grows more valuable with every delivery.

Why Is This Only Becoming Viable Now?

Not because the algorithms are novel — Physics-Informed Neural Networks (PINNs), transfer learning, and active learning have appeared in academic papers for over a decade.

It is because compute has finally become affordable enough.

Previously, deploying a GPU server next to the production line for inference was expensive, hard to maintain, and rarely approved by IT departments. Today, a single edge AI chip is sufficient — the model compresses to 82KB, inference latency is under 100ms, power consumption is a few watts, and it deploys directly beside the equipment.

The algorithms have been ready for years; it is the deployment infrastructure that has matured.

An Honest Conclusion

The notion that “we don’t have enough data” persists because it provides a convenient excuse — AI performance is poor? Not enough data. Haven’t started yet? Still accumulating data.

But in semiconductor applications, waiting for sufficient data before deploying AI means waiting forever.

The real question is not “do you have enough data,” but rather: is your AI architecture designed for small data from the ground up?

If your model incorporates physics from day one and begins adapting from the very first wafer, then 10 wafers are sufficient.

For more technical details on AI for semiconductor equipment, visit our Technical White Paper and Industry Insights section.